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  • Questar - Wednesday, August 24, 2005 - link

    Why doesn't Anand give the details of these CPU's? How many in flight instructions? How deep are the buffers? Do the 14 stages include fetch and decode? Micro ops fusion. Instruction cracking and grouping. Branch prediction.

    All these are significant to overall processor performance, but the talk is still about Ghz and FSB.

    Other sites analyze this info, why not Anand?
  • IntelUser2000 - Sunday, September 11, 2005 - link

    BTW, I am not sure if I am posting a little too late but I hope the editors notice.

    The last pic is Montecito, not Monticeto. Its funny how you guys exactly copied the typo that Intel had.
  • Jeff7181 - Wednesday, August 24, 2005 - link

    The Monticeto being such a huge piece of silicon is impressive. All that silicon, and it all has to work. I guess that explains the huge price tag.
  • sprockkets - Tuesday, August 23, 2005 - link

    Even though we know Intel rushed dual core out, at least I thought they were both together on one die.


    But Intel really did just slap on two cores right together for the Pentium; both are separate dies! Is this the first time we get to see the actual die? Probably because I would be embarassed!

    Wait, that is also the 65nm Pentium D. They still will make it like that? Sad.
  • coldpower27 - Tuesday, August 23, 2005 - link

    Slapping two Cedar Mill cores together instead of having to use 2 Prescott that are next to each other will enahnce yeids for the Dual Core Pentium D processors on 65nm, not to mention the decreases in costs for producing these reduced die size cores on 65nm, were looking at 150mm2 max probably for Dual Core Pentium D on 65nm, with 80mm2 or somewhere in that area for Single Core Pentium 4 on 65nm. Rememeber the experience on 65nm process used by these processors including Yonah will help with Conroe as well. So it's not all lost.

    They still need to produce NetBurst up till the release of this new architecture, hence a few more cores on 65nm for NetBurst.
  • bob661 - Wednesday, August 24, 2005 - link

    I'll wait for the new architecture. Oh wait, I already have the "new" architecture. it's called AMD. :p
  • Hacp - Tuesday, August 23, 2005 - link

    Looks good. This should be able to get 3.4 with 65 NM process..........
  • Beenthere - Tuesday, August 23, 2005 - link

    As expected, Intel is just Jive Talking about future tech and products they can't deliver for years at the earliest. SOS, DD. About the only thing Intel is good at is pulling the wool over the eyes of naive consumers and cheerleading journalists. At least Wall Street is starting to wise up to Intel's bogus claims and obsolete product line. Have you noticed Intel execs have been dumping Intel stock lately??? Gee, I wonder why they'd do that...
  • stateofbeasley - Tuesday, August 23, 2005 - link

    You're an f'ing moron. Intel had working demos of Woodcrest at 2.16 GHz, and if you look at the roadmaps, the release of the products is about a year away, not "years" away.

    Clockspeeds of the demos mentioned here:

    http://www.theinquirer.net/?article=25638">http://www.theinquirer.net/?article=25638

    What the f is it with you and Intel anyways? Did they kill your dog or something? God damn you are stupid.
  • Zirconium - Tuesday, August 23, 2005 - link

    quote:

    Did [Intel] kill your dog or something?

    I almost sh*t myself when I read that.
  • Leper Messiah - Tuesday, August 23, 2005 - link

    I seeing deja vu from the IDF of 2000...tejas and the 10GHz...
  • ChronoReverse - Tuesday, August 23, 2005 - link

    Well, Intel does have far too much resources to NOT come back and at the very least match AMD.

    Pentium M is proven to be quite excellent (note the qualifier that I'm using) and with more extensive modifications (such as those Intel has been doing to create Merom, Conroe, etc.) there's little reason why it ought not be a good performer.


    It'll be very interesting to see if SMT (aka Hyperthreading) will be implemented and implemented properly on these chips. An integrate memory controller would be even nicer.

    Imagine a chip combining multiplecores with unified caches on an integrated memory controller with SMT better implemented. It's not such an incredible thing really.
  • Doormat - Tuesday, August 23, 2005 - link

    I fully expect hyperthreading enabled on the "Extreme Edition" chips.
  • Doormat - Tuesday, August 23, 2005 - link

    Or maybe I just cant tell without some frame of reference in the photograph. Anand, can you give us some approx. sizes? Thanks.
  • Anand Lal Shimpi - Tuesday, August 23, 2005 - link

    Sorry about that guys, I was uploading at 0.38k/s in the keynote hall. Now the connection is doing a lot better and thus you've got pics :)

    Take care,
    Anand
  • reactor - Tuesday, August 23, 2005 - link

    looking very promising, cant wait to see what these can do :)
  • Kiwi - Tuesday, August 23, 2005 - link

    I was beginning to wonder if I was going to have to d/l some new olug-in to see them (the photos)!

    :D
  • GhandiInstinct - Tuesday, August 23, 2005 - link

    lmao.
  • barkingspider - Tuesday, August 23, 2005 - link

    nice photographs. All the processors look the same. How am I going to tell them apart ? BTW I really like the nice red X logo on these new processors. supercool.
  • ElFenix - Tuesday, August 23, 2005 - link

    dasm! just the processor has more memory on it than my first computer. that's impressive
  • Quiksel - Tuesday, August 23, 2005 - link

    wtg guys... i like the fresh info :)

    just get those pics uploaded stat! :D
  • ViRGE - Tuesday, August 23, 2005 - link

    Ya, for anyone freaking out, the pics and pages are uploading right now, so simmer for 30 minutes or so and the rest of it will be up.
  • ssvegeta1010 - Tuesday, August 23, 2005 - link

    quote:

    Above you can see the 65nm Conroe chip, and below you can see it compared to the 65nm Pentium D:


    I can?

    Lol....

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