Original Link: https://www.anandtech.com/show/728



Currently, Intel is far from the most popular CPU manufacturer among the enthusiast community.  During the days of the Pentium II and Celeron, when AMD's most fierce competition was the AMD K6-X line of processors, the community was definitely much more appreciative of Intel processors.  In fact, looking at the stats from our System Rigs Database for AnandTech Forums users we see that there are still 13% more users running Intel CPUs than there are with AMD CPUs. 

This isn't to discredit what AMD has been able to do with the Athlon.  Had the Athlon not been the success it is today, that 13% gap would have widened considerably.  Combined with the weakened Intel product line towards the end of 1999 and the lackluster performance of the Pentium 4 in today's applications and benchmarks, it isn't surprising that AMD has been the choice of many lately. 

At this year's Spring Intel Developer Forum Conference the tone was of a completely different nature than what we have seen at IDF for the past few sessions.  Within the course of this article you will not only learn about some very interesting technology from Intel for use in the server market, but you will also see their plans for DDR SDRAM and RDRAM, a chipset with 6.4GB/s of memory bandwidth, the return of the Memory Translator Hub and much more.

A different type of IDF

If you remember this time one year ago, there was a lot of activity at IDF as the Pentium 4, then going under the codename Willamette, was first revealed to the public.  We got the chance to see the first glimpse of what a 1.5GHz processor looked like and we were shocked by the fact that the Willamette's Integer units would operate at twice that frequency: 3GHz. 

Later that year, the Pentium 4 was released and although it offered clearly advanced technology on paper it would not perform well in any of today's applications and games.  A lower clocked Pentium III or Athlon would easily trump the Pentium 4 even while the latter was running at a 25% higher clock speed.  However passing judgment on the Pentium 4 wasn't as simple as we had originally thought. 

There isn't a doubt about it that the performance of Rambus DRAM (RDRAM) on the Pentium III platform was poor at best.  Realizing that the Pentium 4 actually benefited from RDRAM helped us understand exactly why Intel pushed for RDRAM so early, even though the Pentium III couldn't offer the performance improvement both Intel and Rambus were promising.  The Pentium 4 is a completely different beast, its 100MHz Quad-pumped FSB keeps the processor fed with data and coupling it with an equally bandwidth powerful memory bus is necessary to keep its performance levels high enough.  We have already illustrated this not too long ago in our review of the VIA KT133A chipset in explaining why the performance improvement gained from DDR SDRAM on the AMD 760 isn't as great as we'd like to think. 

At this IDF, the tone was definitely more sedated.  There was much less marketing hype surrounding the show and more of an idea of looking towards the future.  The Pentium 4 has been released, and Intel will be ramping up production of it faster than they ever have in the past.  And for the first time since AnandTech has been visiting IDF we really got a chance to see Intel focus on the future rather than trying to explain why current performance is the way it is.

There's less hype for the press to write about, but there's actually worlds more information and technology to digest. Let's get started.



"Putting an end to the Performance Debate"

In our Pentium 4 Review, we stated that the Pentium 4's success is clearly dependent upon a few events occurring.  The most important two being that the Pentium 4 must ramp in clock speed very quickly and that its SSE2 instruction set must be taken advantage of.  While Intel isn't changing their roadmap any from what we have already told you about, we did get more confirmation as to the Pentium 4's future.

There is definitely a very poised attitude around Intel about the future performance of the Pentium 4.  History has shown us that as we move forward, applications and games become much more bandwidth intensive as they adapt to what the hardware industry can offer.  If you don't believe it, then go back to running using a 66MHz memory bus and see how freely the frames fly in Quake III, or how quickly you can render a scene in 3D Studio MAX.

So if the software and applications of tomorrow are going to be more bandwidth intensive, the Pentium 4 should do just fine, right?  Having a Front Side Bus (FSB) capable of transferring 3.2GB/s of data (peak theoretical), and a memory bus capable of feeding that very same amount of data, the Pentium 4 is set to tackle the most bandwidth intensive of applications.  That's exactly why Intel refuses to focus on anything but MP3 and Video encoding performance with the Pentium 4.  They even ran a FlasK encoding demo at the first Keynote at IDF. 

The issue of SSE2 optimizations is really in the hands of the developers.  Intel has made public their latest compilers and tuning software that helps the developer include SSE2 optimizations wherever possible.  With AMD's decision to support SSE2 with their x86-64 line of processors, there isn't much question that SSE2 will be taken advantage of in the future. 

However both of these issues can only rely on time to tell the story.  What Intel can do and what they are going to do to speed up the process is, of course, speed up the processor.  The Pentium 4 is still on course to receive its die shrink in the second half of this year, and that will hopefully finally give some end to the Pentium 4 performance debate. 

We got confirmation that the 0.13-micron Pentium 4 (codename Northwood) will debut at above 2GHz, although there are going to be versions at lower speeds as well.  This core will have a much smaller die size than the Pentium 4 (approximately 1/2 the size of the 217 mm^2 current P4).  Intel may actually use the smaller die to increase the cache size of the Pentium 4 to 512KB although we still have not received confirmation on this. 

A 2.1 - 2.5GHz Pentium 4 could offer tremendous performance, finally differentiating itself from Intel's Pentium III, which has continued to be the better option for performance in today's applications.  If you are going to be going down the Pentium 4 route, it is definitely best to wait for the 0.13-micron Pentium 4.

Intel actually had an air-cooled (using a normal heatsink/fan) demonstration of a 2GHz Pentium 4 at the show. 

The question that does remain unanswered is: will Intel's next incarnation of the Pentium 4 be nothing more than a die shrink with more cache, or will the blue group decide that current application performance is an important factor to consider and maybe re-architect some of the P4 core? 

We've previously positioned the Pentium 4 as analogous to the Pentium Pro.  If you remember back to 1995 when the Pentium Pro was introduced, its 16-bit performance was clearly a disappointment, even to the point where it was lower than that of the regular Pentium.  But Intel said that 32-bit code was the future (and they were not lying), therefore somehow justifying the Pentium Pro's poor 16-bit performance.  When push came to shove however, the very next incarnation of the Pentium Pro's P6 architecture had received some definite architectural improvements, as the Pentium II was much more of a 16-bit application performer than the Pentium Pro. 

The true test will be to see how much Intel believes in the Pentium 4's architecture as is or if they will make some architectural changes when the Northwood's introduction rolls around later this year.

We titled this section "Putting an end to the Performance Debate" for a reason, because it was a quote from a very high level Intel employee in regards to the Northwood. Take that for what it's worth; in a few months we'll provide you with benchmarks to either support or oppose that statement.



More Pentium 4s = More RDRAM

Intel is still strongly touting their belief in RDRAM, which is actually proving to be useful with the Pentium 4.  Rambus is definitely in the middle of some very interesting legal situations, but we're not evaluating legal practices here so we'll focus on what their technology is hoping to bring to Intel and what it is already doing.

It is only in fair journalism that we present the fact that RDRAM has come down in price.  The big argument when RDRAM was released was that its price was entirely too high while Rambus argued that it would come down.  Well, it has and so has the price of DDR SDRAM as well although it didn't start at nearly as high of a peak as RDRAM. 

The above graph shows data comparing PC800 RDRAM prices to PC2100 DDR SDRAM prices from our Weekly Motherboard & Memory Price Guides for the past 8 weeks.  We did not include the price of PC133 SDRAM because contrary to what promoters of both technologies (RDRAM & DDR) have promised, neither memory technology can touch the extremely low prices that PC133 SDRAM is going for. 

The peak that DDR SDRAM held at the end of last year and in the transition to this year was what Intel was quite happy about since they were finally able to say that RDRAM was cheaper than DDR SDRAM.  The case now is that both technologies are approximately equal in price and neither happens to be competitive with PC133 SDRAM prices, yet.

Intel continued to speak of their commitment to RDRAM for their desktop line of processors, with PC133 SDRAM being used on all of the low end and entry level systems.  If you haven't guessed already, Intel's stance on DDR SDRAM hasn't changed much either.  They are examining it as a viable solution for servers, however its position in the desktop market is questionable.  From Intel's perspective, if the prices of RDRAM continue to drop, DDR doesn't make sense as a production avenue since the dual channels of RDRAM on the i850 chipset boast a lower chipset pin count and thus fewer traces on current Pentium 4 boards.

But before you can go off and praise RDRAM's lower pin count (the bus is still only 16-bits wide compared to DDR SDRAM's 64-bit wide bus), a promise that Rambus made a while ago has yet to come through.  According to Rambus, one of the benefits of RDRAM technology was that it would allow motherboard manufacturers to continue to use 4-layer motherboards because of the fewer traces required between the memory banks and the Memory Controller Hub (essentially the Northbridge).  However all currently shipping Pentium 4 boards are 6-layer designs, we got confirmation of this by speaking with motherboard manufacturers on the topic. 

Intel is working with memory manufacturers in order to help tweak their RDRAM designs so that they may eventually switch to a 4-layer design, but that promise has not held true yet.  For comparison, the majority of KT133 and KT133A motherboards are still 4-layer designs (and are thus cheaper) while all AMD 760 designs are 6-layer. 

Lowering RDRAM cost is definitely in Intel's best interest, and they are working with Rambus and memory manufacturers to do that.  In 2002 a new form of RDRAM will be introduced, known as 4i.  The 4i denotes 4 independent banks that make up the actual RDRAM module.  The current form of RDRAM is defined as 2x16d or 16d, the d denoting dependent and the 16 referring to 16 dependent banks.  The main benefit Rambus hopes to gain from moving to 4i is a decrease in die size, thus decreasing overall memory cost.  A side effect of how RDRAM 4i's bank layouts are done results in a limitation of RDRAM being avoided.  Normally with 16d RDRAM, adjacent banks cannot be accessed at the same time due to adjacent banks sharing each other's sense amps.  The 4i bank layout changes things around slightly by only using 4 internal banks which can all be accessed independently by making use of dedicated sense amps for each bank.  Intel downplayed the performance penalty or gains that would be associated with the move to 4i.  We can say that 4i RDRAM modules will require chipset support, and their release in 2002 will be accompanied by the release of Intel's second RDRAM chipset for the Pentium 4. 

Apparently yields on PC800 RDRAM have improved dramatically since we last visited the issue.  Intel claims that memory vendors are even considering higher frequency parts, such as PC1066.  If Intel were to increase the FSB on the Pentium 4 next year, PC1066 may be the perfect complement. 



No DDR they say!

We went to Intel and presented them with the claims from motherboard manufacturers that their own DDR P4 chipset (Brookdale) was to be released later this year instead of 2002 as Intel's roadmap had originally shown.  Intel did not so much as flinch when confronted with this and they stood their ground stating that Brookdale DDR would be a 2002 solution. 

The Brookdale SDR solution, using PC133 SDRAM, is still on track for a release later this year.  However we can only begin to imagine what kind of performance hit the Pentium 4 will take by effectively reducing its memory bandwidth to 1/3 of what it currently is.  This may be a reason for Northwood to have 512KB L2 cache, to prevent it from having to go to main memory across a 133MHz bus.  For the market segment that the Brookdale SDR solution is aimed at (entry-level P4 systems) it will be rare that large datasets would come into play thus making a 512KB L2 cache a perfect match for the platform.

Intel is continuing to push for DDR SDRAM in their upcoming server platforms, and we will discuss the reasons why shortly.



I'm sorry Ms. Jackson

An interestingly quiet announcement was made while we were covering IDF; it actually required clarification after we heard it the first time.  We've introduced you all to Intel's server version of the Pentium 4 processor before, going under the codename Foster.  The Pentium 4 is strictly a uni-processor CPU, meaning that it won't even work in a multiprocessor board, Intel made it very certain that only Foster would be used in the server market.  We all expected Foster to be called the Pentium 4 Xeon, much like how the Pentium III Xeon was named after its desktop father, the Pentium III.  However in an unexpected but highly foreshadowing move, Intel has decided to call the Foster nothing other than the Intel Xeon.

Not only does this create the Intel Xeon brand, but also it more importantly differentiates the product from the Pentium 4.  This is the biggest hint that the upcoming Xeon will have much more than a larger cache to boast as advantages over the desktop Pentium 4.  The Intel Xeon will be based on the same NetBurst Architecture as the Pentium 4, but that's where the similarity may end.

The current speculation happens to be that the Intel Xeon will feature something known internally to Intel as Jackson technology.  We spent time going around the IDF show floor and querying Intel representatives on the technology; enough people knew about it to pique our interests. 

Jackson technology is supposed to bring Simultaneous Multithreaded (SMT) functionality to a processor's core.  To give a brief overview, the limitation of a single processor is that on the hardware level it can only execute a single thread at one time.  The beauty of SMT is that it allows the processor to execute more than a single thread at once.  The theoretical number of instructions a processor can execute in a given clock cycle (IPC) compared to the processor's actual IPC is during real world usage is generally a very high ratio, simply because the processor is not always kept "busy" as in a good portion of its execution power is wasted.

By being able to execute, on a hardware level, multiple threads on a single processor concurrently, the processor's efficiency is increased dramatically.  This being the tangible benefit of SMT or Jackson technology.  While Intel gave us the usual runaround about how they don't comment on unannounced products, there seems to be a very good chance of seeing SMT in Intel's forthcoming Xeon processor.  



Hint number two

On April 6, 2000 Intel made a very interesting acquisition of Kuck & Associates, Inc. (KAI).  What exactly does KAI do that made Intel purchase them?  Let's let Intel speak for themselves:

KAI is a leading provider of performance-oriented compilers and programming tools used in the development of multithreaded applications. The acquisition is designed to expand Intel's development tool offerings and accelerate the trend toward multiprocessor computing.

KAI has led a very active role in the development of OpenMP, a standard in multithreaded software development.  By incorporating this standard into compilers, Intel can definitely promote code that would not only be very efficient on multiprocessor solutions but also on Simultaneous Multithreaded processors. 

And yes, we asked the KAI representatives at IDF, their KAP/Pro tools for OpenMP did support Jackson SMT technology.  Can we say indirect confirmation of rumors? ;)



Intel in the Server Market

The Intel Xeon processor is still due to be launched in the second quarter of this year in dual processor systems.  Multiprocessor systems will follow later this year. 

The Intel Xeon will debut at 1.4GHz with higher speed grades following later on.  It will also be quite complementary to the current Intel Pentium III Xeon parts since they have already gained quite a bit of market share. 

The Intel Xeon will probably be the first workstation/server class processor to use the microPGA form factor.  The Intel Xeon's interface will be known as the mPGA600.  So although the processor will actually have more pins than the Pentium 4 (600 vs 423), the pins will actually take up less space since they are positioned closer together (hence the name microPinGridArray). 

The microPGA chip form factor will later be introduced on the Northwood, the 0.13-micron Pentium 4 as the mPGA478. 

Shipping this quarter to extend Intel's presence in the server market is a "large cache" version of the Pentium III Xeon running at 900MHz.  The "large cache" denotes a 2MB L2 cache (on-die), making this the largest processor core Intel manufactures. 

In terms of market share, Intel presented some very interesting figures at this IDF regarding the distribution of the server market:

As you can see and as you would expect, the largest slice of the server pie is the 1-2 processor server segment.  However the profit margins grow much higher as you move to 4 and 8+ way servers, making Intel's interest in those markets equally as great if not more.  How popular is Intel in the server market?

Intel's Share of the Server Markets

With very little competition on a price to performance basis in the 1-2 way server market, Intel clearly holds the higher ground there.  However moving forward, AMD will be entering into this very market, which could compromise Intel's 84% current market share.  We would expect the transition in the 1-2 way server market to reflect that of the desktop CPU market, provided that the AMD 760MP proves to be a reliable SMP solution.  While AMD won't take the entire market, they will definitely take their cut of the pie. 

The 4-way server market is still amazingly Intel oriented.  If you think about it, this is all attributed to the segmentation of Intel's product lines with the Pentium Pro and the following introduction of the Pentium II Xeon no more than 3 years ago.  The Pentium II Xeon wasn't too difficult for Intel to develop; it was simply a larger cache version of the desktop Pentium II with a few other server-oriented features.  Yet that very product translated into Intel taking a huge portion of the 4-way server market. 

The new Intel Xeon based on the Foster core will most definitely contribute to the continued success of Intel in this market especially, where they won't face any competition for AMD for at least a little while. 

The real surprise comes in the 8-way server market where Intel doesn't even have 50% market share.  This segment is dominated by the Suns of the world and will take quite a bit of work for Intel to truly make an impact here.  The Intel Xeon won't have any business selling itself here, as this is truly Itanium (IA-64) territory.  The success of the Itanium will be directly reflected in Intel's market share in this segment.  The 8-way server market offers the highest profit margins so Intel is definitely very interested in this particular segment. 



DDR for Servers: It all makes sense

We've heard countless times from Intel that their DDR focus will primarily be for servers, yet Intel does not have a single DDR chipset in their product line.  With the Intel Xeon being launched next quarter, and it being a server part, does anyone see a problem with this?

Intel doesn't, because Intel won't be making the majority of the server chipsets for the Intel Xeon (there is the i860 which is a MP version of the i850 for the Intel Xeon); instead, ServerWorks will.  We all remember ServerWorks from our recent review of their ServerSet III HEsl chipset, which makes use of dual interleaved 64-bit PC133 SDRAM channels to offer DDR memory bandwidth figures at PC133 SDRAM costs.  The problem we ran into with the HEsl was that the Pentium III's 133MHz FSB just isn't enough to demand that sort of memory bandwidth; the Pentium 4's 100MHz Quad-pumped FSB is.

Since the Intel Xeon will share the same FSB as the current Pentium 4, and since we have seen how memory bandwidth hungry a single Pentium 4 processor is, we can only imagine how memory bandwidth hungry two or even four Intel Xeon processors will be.  This is especially true if each processor is capable of SMT, where much more data is being requested and used at the same time.  Needless to say, even a 4-way interleaved SDRAM memory controller wasn't going to help ServerWorks here. 

There is definitely a reason Intel went to ServerWorks for the Intel Xeon chipset: ServerWorks' interleaving memory controller. 



Enter the Grand Champion HE

The Pentium 4 and Xeon's FSB truly only runs at 100MHz; the bus is "quad-pumped" meaning that the peak effective bandwidth is equal to that of a 400MHz bus but it truly operates at 100MHz.  From talking to motherboard manufacturers, it is very difficult to implement a DDR based design where the memory bus frequency and the FSB frequency aren't synchronous.  This translates into the only DDR SDRAM that could be paired up with the P4's bus being PC1600 DDR SDRAM or as Intel likes to call it DDR200 since it operates at 100MHz.  DDR200 SDRAM "only" yields as much memory bandwidth as a single channel PC800 RDRAM solution, 1.6GB/s in comparison to the 2.1GB/s of DDR266 (PC2100 DDR SDRAM).  This is where ServerWorks shows off their skills.

The Grand Champion HE chipset supports up to 4 Intel Xeon processors and to feed them, features a 4-way interleaved DDR200 memory bus. 

(100MHz operating clock) * (2 transfers per clock) * (64-bit wide bus) = 12.8Gbps = 1.6GB/s memory bandwidth for PC1600/DDR200 SDRAM

(1.6GB/s memory bandwidth) * (4-way interleave) = 6.4GB/s total memory bandwidth for Grand Champion HE

In order to provide for this incredible memory subsystem, the Grand Champion HE features a Northbridge with close to 1000 pins as well as 5 chips that together make up the memory controller subsystem

The Grand Champion HE supports up to three PCI-X buses (the number of buses is directly proportional to the number of PCI-X controllers that are present on the board) and it also features a Southbridge which is ATA/100 compliant however is currently only working at ATA/66. 

Quad Intel Xeon platform running on a Grand Champion HE Reference Board


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ServerWorks is also not interested in any of the incremental DDR speed increases over the next few months.  Remember, DDR200 is the only thing they can use with the 100MHz Quad-pumped bus.  Whatever DDR technology they implement must run at an initial frequency of 100MHz.  The other option they mentioned was support for DDR400, which would be DDR SDRAM running at 200MHz but effectively transferring at the same rate as the quad-pumped 100MHz FSB.  They are talking to memory manufacturers about it, however it is still at least a year away from actually being a viable option.

Publicly ServerWorks is stating that their Grand Champion HE will begin shipping in Q3 of this year, however they told us that when Intel has a chip, they would have a chipset.  Whether that means Q2 or not is anyone's guess.



ServerWorks on AMD

The obvious question for us to ask ServerWorks was what they thought of AMD entering the server market and if they would ever work with them.  Their response was actually pretty interesting, and can basically be summed up in a few key points:

1) AMD needs a higher bandwidth FSB: Even with its 266MHz FSB, the Athlon's EV6 bus alone doesn't offer as much bandwidth as the P4/Xeon's FSB.  However a counterpoint to be made here is that the EV6 is a point-to-point protocol, meaning that each CPU gets a dedicated path to the Northbridge, which could result in higher overall bandwidth utilization with more than one processor. 

2) PCI-X where are you? As we mentioned in our most recent server upgrade article, there is a clear need for higher bandwidth PCI and even 64-bit PCI won't cut it once you add in things like Gigabit Ethernet and high end RAID arrays. 

3) AMD needs to invest in the technology: We got the hint from ServerWorks that they didn't see AMD as a heavy investor in the type of technology that these guys are building.  The higher margins are in server products, but AMD has to start somewhere so the AMD 760MP may just be the first step into a much larger world. 

We showed you earlier a breakdown of the "Intel-inside" systems in the server market, and in there we mentioned that the highest profit margins reside in the hard hitting SMP systems with more than 4 or 8 processors.  This is the market that AMD must eventually set their sights on as well.  AMD is in a strong situation since their flash memory division has been rather successful, however AMD today is where Intel was at the release of the Pentium II.  They have the ability to take their current product line, which is outperforming much of the competition, and segment it even more to tend to the needs of the higher end server and workstation markets.  This is what they are trying to do with the release of the 760MP but we won't see the true potential of AMD's branch into this market until the introduction of their Hammer line of processors.

ServerWorks isn't going to burn any bridges with Intel just so they can make a dual processor chipset for AMD.  If AMD were to provide a 4 or 8 way ClawHammer/SledgeHammer design that can outperform the Intel Xeon/Itanium then it might just be enough to pique the interests of the folks at ServerWorks.  Until that day, the Intel Xeon will be the only CPU enjoying a 6.4GB/s memory bus.



Set your sights on Mt. McKinley

The past two IDF Conferences have been centered on the Pentium 4 and Intel's upcoming IA-64 processor, the Itanium.  And although the Pentium 4 was present all over the show floor, the Itanium's presence was not nearly as great.  Instead, the Itanium's successor, codenamed McKinley was the talk of the town this time. 

For an Itanium update, the Itanium is still on schedule to be released in the second quarter of this year.  The Itanium will debut at 733MHz and offering possibly higher speed grades, with a backside bus to its off-die L3 cache. 

The McKinley, most likely branded under some form of the Itanium name, will be introduced at the end of this year with platforms shipping in 2002.  The McKinley will offer some significant improvements over the Itanium, including an updated FSB with 3 times the amount of bandwidth as the Itanium's bus.  The McKinley will feature even more execution units for even more parallel processing power and it will move the Itanium's L3 cache on-die. 

The fact that Intel has room to store the L3 cache on-die leads us to believe that McKinley will be a 0.13-micron chip which gives it approximately 50% die savings over the 0.18-micron Itanium.  This could definitely help increase clock speeds and the yield of the McKinley to the point where it would potentially be a formidable contender in the 8-way server market.  Only time will tell.

After just recently receiving the initial stepping of the McKinley processor from their manufacturing plants, Intel had multiple McKinley systems up and running copies of 64-bit Windows XP, 64-bit Linux and HP Unix.  No one has ever argued with Intel's manufacturing capabilities, it is only when they try to push the architecture beyond its limits that problems occur (e.g. Pentium III 1.13GHz).

McKinley on 64-bit Windows XP


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McKinley on 64-bit Linux


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Already making improvements

If you'll remember from our IDF coverage around a year ago, we brought you the first pictures of the Itanium.  The systems were pretty unique since the Itanium CPUs had power bricks sitting next to them that were just as large in size.  The pictures below will hopefully refresh your memory.


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The problem platform designers ran into was that this was simply too big of a design.  In a data center, rack space can get pretty expensive (around $1000 USD per rack per month), and with some companies taking up close to 20 racks they obviously want to make the best use of the space they have.  However sticking a dual processor Itanium setup in a 1U case (about 2" high) would be impossible.  Here's where McKinley comes in.

If McKinley is indeed a 0.13-micron processor (which would make the most sense), it is inherently going to be a cooler running processor than the Itanium.  The problem of heat dissipation is not completely eliminated by the fact that it is a 0.13-micron processor, since two McKinley processors will dissipate around 600W. 

The design that resulted was quite ingenious.  First, the McKinley processor is now integrated into a cartridge with its power supply as you can see below. 


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If you'll also notice, the McKinley uses the same microPGA pin layout we discussed earlier. Notice how tightly packed those pins are.

The cartridge already saves some space, but we still have the issue of getting rid of the heat.  The solution to this problem was to use a very large blower at the front of the 1U rack and blow a lot of air across the two heatsinks allowing the construction of a dual processor McKinley system in a 1U case.  The impeller as they call it (essentially a blower) is capable of moving 70 cubic feet of air per minute at a rotational speed  of 2800 RPM.


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And don't worry, there's more than enough room for memory.



Run for your lives: MTH returns

When the i820 chipset was released, OEMs had such a hard time pushing the chipset because of the incredible cost of RDRAM (very close to $1000 for a 128MB stick).  Intel's quick and dirty fix was to introduce a chip called the Memory Translator Hub that sat between the i820's Memory Controller Hub (MCH) and the memory banks that would translate the 16-bit, 400MHz RDRAM signal into a 64-bit, 133MHz PC133 SDRAM signal.  The same translation would occur on the way back from the memory to the MCH. 

As you can guess, this resulted in a huge performance hit. The drop was anywhere between 10 - 20% when compared to regular PC800 RDRAM without the MTH. 

On the i840, because of its dual channel RDRAM design, Intel developed another chip called the SDRAM Memory Repeater Hub (MRH-S) that performed the same function as the MTH did on the 820 except it worked with the dual channel memory bus of the 840's MCH. Both the MTH and MRH-S were recalled because of reliability issues, much like those we experienced with Tyan's short-lived MRH-S based Thunder 2400 board.

Something caught our eyes when we were looking at an McKinley presentation at IDF.  Since the McKinley will be a server class product it falls under Intel's blanket statement that DDR SDRAM is only for servers.  The McKinley will be using the i870 chipset, and below is the block diagram that raised our eyebrows:


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We've taken the liberty of blowing up the section that we're interested in, see the MRH-D chips that lie between the i870 chipset and the DDR SDRAM banks?  That is a DDR SDRAM Memory Repeater Hub, which sounds a lot like the MRH-S that was made for the i840 that happened to be a variant of the MTH that we all loved to hate. 

This could be a huge performance penalty for McKinley as we noticed when we paired up regular SDRAM and the MTH enabled i820 or the MRH-S enabled i840

The even bigger question is why would Intel release a McKinley chipset without a native DDR SDRAM controller?  Maybe Intel is planning on bringing RDRAM to the server markets as well?  It would make sense since it would be fairly easy to simply remove the MRH-D and replace the DDR SDRAM slots with RDRAM banks.

Keep your eyes on this one; it will be very interesting to see what Intel does here, very interesting indeed. 

We did make sure that the future DDR platforms for the desktop market would in fact be true DDR solutions and wouldn't use a MRH-D controller; luckily we did get confirmation of this.  As you can see by the below block diagram of an upcoming desktop chipset codenamed "Plumas" it has an integrated DDR SDRAM controller.

From the block diagram it also looks like this particular chipset has a dual channel DDR controller, however that could also be an artistic element of the drawing.

We've just scratched the surface…

There is so much more to report on, we've really just scratched the surface with this first article.  InfiniBand, PCI-X, Intel's extreme hatred for Transmeta, the future of desktop LCD and notebook markets, AMD's future, ATI vs NVIDIA in the 3D graphics market and the list goes on. 

Keep checking back for the latest on the updates from the industry.  Until then here are some other articles you may find of interest that relate to the material discussed in this piece:

Weekly Memory & Motherboard Price Guide

ServerWorks HEsl: DDR bandwidth without DDR SDRAM

Intel Pentium 4 1.4GHz & 1.5GHz

CPUs in 2001: Roadmap Update

Intel Desktop CPU & Chipset Roadmap - November 2000

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